FX-Core OSC input and MLCK

[sebxx4]

Hi, I'd like to run FX-Core as slave and generate 12.288MHz clock for it from STM32 (also sample clock and LRCK). If I run FX-Core with 48kHz sample rate, codecs requires 12.288MHz MLCK clock as well. Can I just put one clock signal to FX-Core OSC input and to codecs?

[Frank]

If I understand the config properly then yes, you can. It should be like:

12.288M source to CODEC MCLK and pin 31 of FXCore
BITCLK/SCK to CODEC bit clock/serial clock and FXCore pins 49 and 44 (SCK0/1)
LRCK to CODEC LRCK and FXCore pins 43 and 52 (LRCK0/1)

Check my pin numbers are right

FXCore MCLK, pin 47, is not really used in slave mode as we sync to the LRCK and BITCLK signals for serial transfer and use the pin 31 clock to PLL up to run the core of the chip.

If you have a dev board you can do a minor hack to test this by removing the jumper header from the FX/OSC selector (J209) and connecting a small wire from the oscillator (X100) at the FXCore to the middle pin of this jumper so both are clocked by the same 12.288M, set the CODEC to master and the FXCore to slave and it should all work fine. If you really want to go all out, remove the X100 oscillator and wire it to an off board 12.288M to drive both, set both to slave and put clocks to the SCK and LRCK test points.

[sebxx4]

Thanks Frank.
Yes, I have a devboard, but I didn't even think I could test it this way